JPH0563944B2 - - Google Patents

Info

Publication number
JPH0563944B2
JPH0563944B2 JP58108108A JP10810883A JPH0563944B2 JP H0563944 B2 JPH0563944 B2 JP H0563944B2 JP 58108108 A JP58108108 A JP 58108108A JP 10810883 A JP10810883 A JP 10810883A JP H0563944 B2 JPH0563944 B2 JP H0563944B2
Authority
JP
Japan
Prior art keywords
cell
metal wiring
layer metal
wiring
basic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58108108A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59232442A (ja
Inventor
Masami Murakata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP58108108A priority Critical patent/JPS59232442A/ja
Publication of JPS59232442A publication Critical patent/JPS59232442A/ja
Publication of JPH0563944B2 publication Critical patent/JPH0563944B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP58108108A 1983-06-16 1983-06-16 半導体集積回路 Granted JPS59232442A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58108108A JPS59232442A (ja) 1983-06-16 1983-06-16 半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58108108A JPS59232442A (ja) 1983-06-16 1983-06-16 半導体集積回路

Publications (2)

Publication Number Publication Date
JPS59232442A JPS59232442A (ja) 1984-12-27
JPH0563944B2 true JPH0563944B2 (en]) 1993-09-13

Family

ID=14476089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58108108A Granted JPS59232442A (ja) 1983-06-16 1983-06-16 半導体集積回路

Country Status (1)

Country Link
JP (1) JPS59232442A (en])

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0644613B2 (ja) * 1985-10-22 1994-06-08 日本電気株式会社 半導体装置
JPH05136380A (ja) * 1991-11-13 1993-06-01 Nec Ic Microcomput Syst Ltd 半導体集積回路装置
KR100229577B1 (ko) * 1996-01-31 1999-11-15 포만 제프리 엘 게이트 어레이 셀 및 이것을 포함한 집적 회로 칩
JP2008147331A (ja) * 2006-12-08 2008-06-26 Matsushita Electric Ind Co Ltd 半導体集積回路及び半導体集積回路の修正方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5120268A (en) * 1974-08-08 1976-02-18 Takashi Ishikawa Taika * tainetsusei goseijushi
JPS5582450A (en) * 1978-12-15 1980-06-21 Nec Corp Semiconductor integrated circuit
JPS586157A (ja) * 1981-07-03 1983-01-13 Nippon Telegr & Teleph Corp <Ntt> Ｃｍｏｓマスタ・スライスｌｓｉ

Also Published As

Publication number Publication date
JPS59232442A (ja) 1984-12-27

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